A wide variety of digital systems including microprocessor systems make use of serial data transmission in order to minimize the number of data channels between the digital system and a peripheral device being controlled. Examples of such systems includes process control or numeric control systems, data communication systems involving transmission and reception via a modem (modulator-demodulator) and serial peripheral memory units such as tapes, disks, or cassettes. Recent applications include flexible disk memory systems ("floppy disk") which have a relatively high speed data transfer requirement. In microprocessor systems, low cost integrated circuits have been designed which provide for synchronous serial data communications with the bidirectional data bus of the microprocessor system.
Digital systems of the type listed above normally require the interchange of long serial blocks of data. In order to achieve maximum efficiency in such serial data transmission, synchronous transfer methods are often employed. In synchronous transmission, special characters or codes are transmitted as a preamble to a data message comprising a continuous stream of data characters with no delineation indicating the end of one character and the beginning of the next. Thus, synchronous data communication systems transmit and receive message blocks consisting of an initial synchronization code followed by a continuous stream of data bits. Each data bit has equal bit widths and is transmitted at a fixed and defined frequency. When the synchronization code is detected at the beginning of the message block "character framing" is established. Character framing is defined as the process by which the beginning and end of the successive data character is located in the data bit stream. Character framing is normally accomplished at the beginning of the message block and is maintained throughout the block.
Conventional systems receive serial data characters from a data channel using a shift register and maintain character frame by means of a counter, typically a binary counter. In this type application, the binary counter counts to a maximum state and then automatically recycles or "rolls over" to reestablish its initial count state. In the synchronous data system, the counter is initialized when correct character frame is established. Each time the counter "rolls over" it causes a parallel transfer of data out of the shift register and reinitialization of the counter. Conventional synchronous data communications systems must provide an operation option which allows the reception of serial data characters whose length (including a parity bit) may be 7 bits, 8 bits, 9 bits or any other appropriate word length. Thus, the binary counter technique requires at least four counter stages with sufficient control logic to adjust and detect maximum count states which change depending upon the length of the serial data character received. These counter stages and the associated control logic increase the number of logic elements required to implement the receiver portion of a synchronous data communications system. In an integrated circuit embodiment these additional logic components result in increased circuit complexity and increased layout area on the integrated circuit chip.